core-v-verif

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Adding support for RVFI on cv32e40p env

6

First step toward supporting RVFI based test, done by merging the original env and testbench with the cv32e40x one. For now, only the ci tests are supported

YoannPruvost

Generation of VCD for cva6 using verilator

5

Hi All, I am trying to enable vcd on verilator for cva6 core, could anyone suggest where to enable vcd in core-v-verif environment. Thanks in advance.

spidugu444

Floating point multipication issue in RISCV cva6

4

Hi All, In CVA6 riscv-arch-test suite fmul tests are failing due to incorrect calculation as shown in below attached screenshot.  As shown in above in line 157 and 182...

spidugu444

Debug privilege tests

2

Suite of 6 test-cases focused on verifying correct behavior when switching between user and debug mode.

silabs-anvesten

ISS: dcsr.prv bit-field does not update in the rvvi

6

### Comment Writing to the dcsr.prv bit-field results in a mismatch between the rvfi and rvvi. The ISS seems to not update the value while the core does. ### Printed...

silabs-anvesten

Overview of open issues related to CV32E40X/CV32E40S Imperas ISS

30

This issue will be used to provide an overview of open issues related to CV32E40X/CV32E40S Imperas ISS. The list will be continuously updated. Issues that exist on both CV32E40X and...

Silabs-ArjanB

Signed-off-by: Kun Zhu

silabs-kun

Pmp test

2

Completed tests: DefaultNone, DefaultFull, ResetRegisters, MmodeOnly. Ongoing tests: NapotMatching, TorMatching (assertion error), TorZero, TorNomatch.

silabs-kun

Cover cv32e40x issue #325 in a regression test

4

https://github.com/openhwgroup/cv32e40x/issues/325 This bug does not pop up in regression, this needs to be covered.

silabs-mateilga

xmsim: *E,ASRTST, uvmt_cv32e40s_pmp_assert.sv

10

# Error message xmsim: *E,ASRTST (/work/kuzhu/core-v-verif/cv32e40s/tb/uvmt/uvmt_cv32e40s_pmp_assert.sv,728): (time 60379800 PS) Assertion uvmt_cv32e40s_tb.dut_wrap.cv32e40s_wrapper_i.core_i.load_store_unit_i.mpu_i.pmp_i.u_pmp_assert_lsu.gen_pmp_assert.a_accept_only_legal has failed stop: uvmt_cv32e40s_tb.dut_wrap.cv32e40s_wrapper_i.core_i.load_store_unit_i.mpu_i.pmp_i.u_pmp_assert_lsu.gen_pmp_assert.a_accept_only_legal = failed) xmsim: *E,ASRTST (/work/kuzhu/core-v-verif/cv32e40s/tb/uvmt/uvmt_cv32e40s_pmp_assert.sv,782): (time 60379800 PS) Assertion uvmt_cv32e40s_tb.dut_wrap.cv32e40s_wrapper_i.core_i.load_store_unit_i.mpu_i.pmp_i.u_pmp_assert_lsu.gen_pmp_assert.a_nomatch_umode_fails has failed stop: uvmt_cv32e40s_tb.dut_wrap.cv32e40s_wrapper_i.core_i.load_store_unit_i.mpu_i.pmp_i.u_pmp_assert_lsu.gen_pmp_assert.a_nomatch_umode_fails =...

silabs-kun