risc-v topic

A FPGA supported RISC-V CPU with 5-stage pipeline implemented in Verilog HDL

Michaelvll

[mirror] ARMv8-A/RISC-V kernel (with UEFI bootloader)

kivikakk

Sample Rust programs for the GD32VF103

reynoldsbd

All CPU and MCU documentation in one place

larsbrinkhoff

32-bit RISC-V system on chip for iCE40 FPGAs

grahamedgecombe

Trying embedded Rust on the Pinecil GD32VF103 RISC-V device.

alvinhochun

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

viktor-prutyanov

A RISC-V Core (RV32I) written in Chisel HDL

carlosedp

😎 A curated list of awesome RISC-V implementations

drom

Curated list of awesome resources related with RISC-V

xmpf