cva6
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The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description hey guys, i don't know how to manually simulate...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description 1) Make HPDcache synthesisable by modifying the CVA6 synthesis...
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description @colluca has sublitted a PR to fix the following...
### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description Today PMP dedicated to data is inside MMU module....
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of data scratchpad into the cva6 core. It...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of instruction scratchpad into the cva6 core. It...
### Is there an existing CVA6 task for this? - [X] I have searched the existing task issues ### Task Description Integration of a dedicated bus to program external peripherals....
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description We are currently porting the verification to be compliant...
This PR fixes issue https://github.com/openhwgroup/cva6/issues/1785, implementing the same performance enhancement proposed in PR https://github.com/openhwgroup/cva6/pull/1497. Compared to the latter, it fixes a problematic corner case, which was likely the cause of...
### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description I increased the main frequency of CVA6 to 100MHz...