cva6

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### Is there an existing CVA6 bug for this? - [X] I have searched the existing bug issues ### Bug Description **Summary** Delay in enforcing PMP rules in CVA6 cores....

riscv914

[TASK] Integrate lint checking mechanism in GitHub actions

1

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description RTL Linting is used to verify adherence to specified...

fatimasaleem

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description Develop an UVM component or assertion module to verify...

JeanRochCoulon

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description Generate PMP tests for embedded config ### Required Changes...

JeanRochCoulon

[TASK] AXI spec, dvplan and verification

1

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description AXI spec, dvplan and verification ### Required Changes Develop...

JeanRochCoulon

[TASK] Make several AXI feature optional

1

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description CVA6 AXI supports many features, removing unused features would...

JeanRochCoulon

### Is there an existing CVA6 task for this? - [x] I have searched the existing task issues ### Task Description Write PMP DV plan for embedded configuration ### Required...

ASintzoff

Verification goal for FENCEI feature in CVA6 DV plan

3

The [verif goals](https://github.com/openhwgroup/core-v-verif/blob/ddcc187fdf34901dd22967a5656a910ddc850258/cva6/docs/VerifPlans/FENCEI/VP_IP001.yml#L25) for this feature does not guarantee that the fencei instruction has worked. If the instruction following the fencei has not yet been pre-fetched then the newy stored...

MikeOpenHWGroup