[TASK] Instruction scratchpad integration

[CoralieAllioux]

Is there an existing CVA6 task for this?

• [X] I have searched the existing task issues

Task Description

Integration of instruction scratchpad into the cva6 core. It means to have an additional memory closed to the core, which bypassed the cache. It is based on the same principal than data scratchpad (#1808).

Required Changes

• Changes done for data scratchpad (#1808)
• Adapt frontend to bypass the cache and make the request to the instruction scratchpad instead
• Add SRAM and controller to interact with the core and AHB interface
• Memory map update: dedicated space for instruction scratchpad

Current Status

RTL done, verification in progress

Risks

cva6 interface update and memory map update. Could have an impact on max frequency if enable, depending on the instruction scratchpad size.

Prerequisites

No response

KPI (KEY Performance Indicators)

No response

Description of Done

PR done in cva6 master. Instruction scratchpad functional for dedicated configuration, with dedicated tests.

Associated PRs

No response