verilog-hdl topic
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verilog-hdl repositories
RISCV_CPU
65
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15
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A FPGA supported RISC-V CPU with 5-stage pipeline implemented in Verilog HDL
getting-started-with-verilog
21
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11
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Verilog modules for beginners
HDL-deflate
53
Stars
7
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FPGA implementation of deflate (de)compress RFC 1950/1951
vunit
692
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248
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VUnit is a unit testing framework for VHDL/SystemVerilog
Pyverilog
576
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166
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Python-based Hardware Design Processing Toolkit for Verilog HDL
veriloggen
298
Stars
57
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Veriloggen: A Mixed-Paradigm Hardware Construction Framework
nngen
322
Stars
45
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NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
vscode-verilog-hdl-support
282
Stars
75
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HDL support for VS Code
32-Verilog-Mini-Projects
482
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95
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Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and...