high-level-synthesis topic
veriloggen
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
nngen
NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
poprc
A Compiler for the Popr Language
hlslib
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
lenet5_hls
FPGA Accelerator for CNN using Vivado HLS
PipelineC
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
calyx
Intermediate Language (IL) for Hardware Accelerator Generators
hls_tutorial_examples
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
dace
DaCe - Data Centric Parallel Programming
gemm_hls
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.