Jiuyang Liu

Results 339 comments of Jiuyang Liu

Maybe I need to upstream this: https://github.com/chipsalliance/t1/blob/real-rocket-v/elaborator/src/Elaborator.scala and its usage https://github.com/chipsalliance/t1/blob/real-rocket-v/elaborator/src/rocketv/ALU.scala for migrate out from Stage API. wdyt @jackkoenig?

@Avimitin please - download lvgl from upstream - Maintain this pr as a patch - Draft a test in CI for it

Good idea! I have been thinking how to instantiating the corresponding TestBench from DUT. I think this PR gives us a acceptable solution. I wonder if there is any related...

But why it will deadlock, I don't understand. It sounds like the deadlock is coming from the structural hazard between scalar and vec/rocc. However they basically has no real dependencies?

result of `nixpkgs-review pr 338312` (build on aarch64) ``` $ git -c fetch.prune=false fetch --no-tags --force https://github.com/NixOS/nixpkgs master:refs/nixpkgs-review/0 pull/338312/head:refs/nixpkgs-review/1 remote: Enumerating objects: 2132, done. remote: Counting objects: 100% (1028/1028), done....

I think split the `stdlib` to `chisel-stdlib` is good choice, since we never released which(only those build from source(like me))

link to chipsalliance/chisel#4204

Try patch chipsalliance/chisel#4205

Sorry for the late reply, I'll try to give a reproducible example these two days.