Jiuyang Liu

Results 339 comments of Jiuyang Liu

I think we need to add an intrinsic first, and return a `UInt`, while this `UInt` can be feed to `printf`.

Seem scala-native/scala-native#3242 is already landed? Any plan for os-lib to support `os.proc`? This might be the last piece to bring scala native become useful.

The reason of post processing is hard is we also want write a giant log into file while keeping stdout clean for other usages e.g. uart.

> Thinking about this... Would it be acceptable to pipe all of the output (stdout, stderr, or both) into a script which then does the splitting for you, while leaving...

> If we did do this, then it's reasonable to both build the logging library in Chisel and provide the script for working with this in Chisel as well. 🤓...

I think the situation is the `stdout` is not only be used by chisel, but also be used by other programs on the supply chain, e.g. UVM, C libraries. We...

``` circuit Foo: file Bar, "Bar.log", read public module Foo: input clock: Clock input a: UInt printf(clock, UInt(1), Bar, "hello world") ``` I thought about it, maybe the file handler...

> Mangling of private modules (private symbols). If the two circuits both have a module Queue, then these should be renamed, ideally deterministically (though I would not mandate this). The...

At the first pass of linking(I'm not sure if it is a `Pass`) is mangling: Mangling the name of all private module in all circuits and update the reference in...

I wonder should the python parser separates from this repo as a standalone project? Originally, it was simple. But recently the trend of it seems to grow into some big...