chisel
                                
                                 chisel copied to clipboard
                                
                                    chisel copied to clipboard
                            
                            
                            
                        Chisel: A Modern Hardware Design Language
@seldridge bringing from chisel:matrix.org **Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** 1. Define a Verilog blackbox with inout signals. 2. Connect these inout signals...
## About this PR 📦 Updates [org.scalameta:scalafmt-core](https://github.com/scalameta/scalafmt) from `3.8.5` to `3.8.6` 📜 [GitHub Release Notes](https://github.com/scalameta/scalafmt/releases/tag/v3.8.6) - [Version Diff](https://github.com/scalameta/scalafmt/compare/v3.8.5...v3.8.6) ## Usage ✅ **Please merge!** I'll automatically update this PR to resolve...
Fix a bug where the dedup group phase was only run for the ChiselStage class and not its companion object. Add this phase. #### Release Notes Fix bug where dedup...
Consider the following: ``` scala //> using repository "sonatype-s01:snapshots" //> using scala "2.13.15" //> using dep "org.chipsalliance::chisel:7.0.0-M2+432-486b55dc-SNAPSHOT" //> using plugin "org.chipsalliance:::chisel-plugin:7.0.0-M2+432-486b55dc-SNAPSHOT" //> using options "-unchecked", "-deprecation", "-language:reflectiveCalls", "-feature", "-Xcheckinit", "-Xfatal-warnings",...
**Type of issue**: Feature Request **Is your feature request related to a problem? Please describe.** When describing a normal enum it is relatitly easy to do so: ```scala object MyEnum...
**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** ```scala class ProbeIO extends Bundle { val a = UInt(32.W) } class WithProbeIO extends Bundle { val...
**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** Run this: ```scala //> using repository "sonatype-s01:snapshots" //> using scala "2.13.14" //> using dep "org.chipsalliance::chisel:7.0.0-M2+364-7b029eed-SNAPSHOT" //> using...
**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** Run the following code on 6.6.0 or head of main. ```scala import chisel3._ import chisel3.experimental.{annotate, BaseModule} import...
As discussed in #4681, the LTL assert-like intrinsics all contain the same snippet of code which only differs by the intrinsic name: ```scala private[chisel3] object VerifEnsureIntrinsic { def apply(label: Option[String]...
As discussed in #4681, clean up the ScalaDoc of `AssertProperty` and friends to include an example and not refer to `AssertPropertyLike.apply`.