ibex
ibex copied to clipboard
lowRISC
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Hi there, according to the IBEX documentation the performance counter behaviour of mhpmcounter3 to mhpmcounter31 can be configured by mhpmevent3 - mhpmevent31 register: [ibex-core.readthedocs.io](https://ibex-core.readthedocs.io/en/latest/03_reference/performance_counters.html) ## Observed Behavior writing to register...
# Introduction These tests and support libraries have been ported from the OpenTitan repository. I have stripped some of the less relevant dependencies, with the exception of: - Bit manipulation...
This PR adds an implementation of the ratified v.1.0.0 Scalar cryptography extension spec. Particularly, this PR adds a set of instructions specified for Zkn (supporting NIST algorithm suite) and Zks...
Opening a draft PR to get some early input and suggestions. As proposed in #1481, this PR adds a Github action workflow that synthesizes Ibex via Yosys, using Surelog-UHDM frontend....
The current riscv_csr_test has a couple of issues and could have it's functionality expanded - [ ] Deal correctly with read-only fields (it will generate instructions that write a value...
The RISC-V spec gives us some flexibility how precise traps should be. We need to document our current behavior. I'd expect all traps to be precise, but we should double-check...
This issue separately tracks a specific part of issue #674. The Makefile in `dv/uvm/core_ibex/Makefile` tries to be careful to regenerate targets if you change an option. This way, we ensure...