rohd
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intel
The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
### Motivation When viewing `vcd` `StateMachine` is split into `sequential` and `combinational`, which introduces a bit of chaos due to the lack of context. It is better to let the...
## Description & Motivation This set of changes adds an easy way to locally check text formatting and link health in Markdown files. **TODO:** Add required dependencies to GitHub Codespaces...
### Motivation The comment style in the `example/tree.dart` example is different from the other examples. Subjectively, it is more difficult for beginners. ### Desired solution Rewrite the comments, linking them...
### Describe the bug The order in which `clock` is connected to module inputs affects how the circuit behaves. The first screenshot shows the correct behavior, the second shows the...
### Motivation There are some scenarios where creating latches is valuable (`always_latch`). ### Desired solution Add a way to generate latches to ROHD. Perhaps as a sibling or configuration of...
### Motivation It might be worth adding a clarification to the documentation that `actions` in `State` (state `StateMachine`) contains combinational, not sequential logic. Personally, I thought that sequential logic is...
### Describe the bug It is possible to set up port connectivity between two `Module`s such that after `build` each of the modules have the other listed as a sub-module...
## Description & Motivation Since the lints for Dart is updated [quite often](https://github.com/dart-lang/linter/releases) and [no official package](https://github.com/dart-lang/linter/issues/2994) that provides a complete set of rules, the problem of automating tracking arises....
### Motivation Since ROHD has become a [DartPad-supported](https://github.com/intel/rohd/discussions/272) package, it might be worth considering playground limitations. Attempting to use `WaveDumper` results in an error because the ability to save files...
### Motivation Sometimes a "top" level module is purely for integration purposes (e.g. for testbench purposes, or early in development), and so it has no external top-level ports. In this...