CyrIng

Closing issue To sum up: * Voltage curve is an optional compilation directive. User has to specialize the formula macro source code by her/him self. * The default build computes...

@madoverlord40 Hello, I would like to make some code cleanup but I wonder if you are you building with `AMD_VCO` ? If not can you tell if the latest _CoreFreq_...

@madoverlord40 Thank you for trying _CoreFreq_ with your 9950X. This is indeed the first report I'm receiving and I will need a lot of traces to debug the state of...

The baseclock `BCLK` can be fixed to `100 MHz` with a driver parameter ``` insmod build/corefreqk.ko AutoClock=0 ``` Or (if installed) ``` modprobe corefreqk AutoClock=0 ``` Apparently the baseclock is...

The frozen system issue could be due to an access conflict onto the SMU between _CoreFreq_ and another Linux driver agent like `k10temp`, `amd_pstate` You have to unload them or...

We need to know what's the reference base clock is ? Aka `BCLK`, the baseclock has to be displayed in one of your UEFI/BIOS screen. A `70 MHz` rather than...

Btw for all your next screenshots please switch to the custom view, press `y` key. Or start with view selector option: ``` corefreq-cli -t custom ```

Also have you noticed that some CPU temperature of `96°C` had exceeded the `95°C` TjMax

Thanks @InstLatx64 MSR [dump](https://github.com/InstLatx64/InstLatx64/commit/3d181fb6029f327b120dcab051ffd53d5db8ec19#diff-210f04209642dcdf0ced26e1b1145a27c460496bb45bdb1a33cfb9f3dc855ee6R2959) I see than the TSC seems decoralated from the base clock ``` ------[ MSR Registers / Logical CPU #0 ]------ CPU Clock (Normal): 5760 MHz CPU...

> other sensors can report higher. Just a thought, what do you think? True, some are die sensors, others for the whole package. It's not that easy to guess which...