amaranth
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amaranth-lang
A modern hardware definition language and toolchain based on Python
it would be quite useful to be able to output [`event`](https://github.com/SanDisk-Open-Source/pyvcd/blob/be48db910de018ab82c3133dd2464f76e9eeb03a/vcd/writer.py#L40) variables to vcd since that can be used for debugging, allowing an indication of when a process does something....
Similiar to #373 platform.add_clock_constraint does not work for instances in lattice diamond. However, the same fix does not seem to be applicable. Do you have any ideas what is going...
It seems I can write something like `m.d.comb += Assert(Past(signal) == 0)`. If `multiclock` is off in the sby file, what exactly is `Past`? Here's an example. First, `example.py`: ```python...
Assigning a signal has to be done in a domain, e.g. comb: `m.d.comb += signal.eq(expression)`, however it is easy to forget and just write `signal.eq(expression)`. This will lead to a...
For designs that want to be as platform-independent as possible, it would be nice to have access to the total latency from the design to the physical IO in IO...
Hi, after a short discussion with @whitequark I was asked to make an issue of this behavior. What I have is a module which as a local clock domain, and...
**Issue by [whitequark](https://github.com/whitequark)** _Saturday Sep 14, 2019 at 21:22 GMT_ _Originally opened as https://github.com/m-labs/nmigen/issues/206_ ---- It looks like the existing FSM sub-language is not expressive enough (e.g. #195, #205). Right...
This question comes up regularly on the #nmigen IRC channel.
Currently, DiffPairs and Pins can be either inverted completely or not at all. This is a problem in corner cases where the hardware inverts some parts of a logical Bundle...
Consider those two elaboratables: ```python class Impl1(Elaboratable): def __init__(self): self.sel = Signal() self.A = Signal() self.B = Signal() def elaborate(self, platform): m = Module() with m.Switch(self.sel): with m.Case(): m.d.comb +=...
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A modern hardware definition language and toolchain based on Python