Craig Topper

> We are using multiply here because this is the default expanding of `ISD::CTPOP`. > > https://github.com/llvm/llvm-project/blob/72c729f354d71697a1402720c90b57ff521b6739/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp#L8653-L8718 > > > We may need custom lowering of `ISD::CTPOP` when there is...

X86 gets it right by accident. By manually commuting the operand in IR, I can get it to generate the same issue as RISC-V https://godbolt.org/z/M1sYYv7Tr

> X86 gets it right by accident. By manually commuting the operand in IR, I can get it to generate the same issue as RISC-V https://godbolt.org/z/M1sYYv7Tr X86 tries ANDN on...

> @EugeneZelenko Based on @topperc's analysis, this is not an issue with the RISC-V backend, correct? I think it's an issue with RISC-V backend and the X86 backend. I don't...

@AtariDreams GlobalISel is still very much in development for X86. Why do you think this needs to be backported?

Can `lookupSysRegByEncoding` use `equal_range` instead of calling `lower_bound` and `upper_bound`? Then iterate the returned range to push into the vector?

Can the new signature of `lookupSysRegByEncoding` return the std::pair from `equal_range` instead of needing to copy into a vector?

> We build several targets, some with custom CSRs (like in RISC-V downstream toolchains) and targets that do not have them (e..g, ARM, AArch64, etc.) and need the original API....

> > > We build several targets, some with custom CSRs (like in RISC-V downstream toolchains) and targets that do not have them (e..g, ARM, AArch64, etc.) and need the...

> Maybe we can consider a separate patch that sets the variables to true for RISC-V and modifies parser/printer to use the new API. This way downstream users of RISC-V...