Craig Topper
Craig Topper
this inline assembly is ill-formed. Having "+c" and "c" is conflicting. I will try to find the bugs for the other 2 times this has been filed.
One of them is #40330
Minor correction __builtin_ctz is undefined for 0 and that table lookup isn't. So its really x != 0 ? __builtin_ctz(x) : 0 or if you have the tzcnt instruction which...
There was a proposed patch for this here https://reviews.llvm.org/D113291
I think we can solve replacing the `cmp w0, #0` and `csel` with `and` as a separate optimization.
What would you change them to? I think both operands will end up with the same vreg unless the operand is undef which would produce an IMPLICIT_DEF instruction for each...
This seemed to be happening via a very happy accident of DAGCombine optimizing the expanded sdiv by constant code. When `X86TargetLowering::BuildSDIVPow2` was added, it broke. RISC-V for example still generates...
Looks like if I add the `exact` flag to the sdiv and run InstCombine, we do turn it into a shift. So I guess we're missing logic to set the...
I suspect it has something to with i8 being a legal type on X86 and not on many other targets. Right before SimplifyCFG the X86 version of the switch is...
SelectionDAG is correct. It's the translation to MachineIR where we lose the freeze and start propagating undef. ``` *** MachineFunction at end of ISel *** # Machine code for function...