network-on-chip topic
axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
NoCRouter
RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni
ravenoc
RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
tnoc
Network on Chip Implementation written in SytemVerilog
constellation
A Chisel RTL generator for network-on-chip interconnects
esp
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
NoCpad
HLS for Networks-on-Chip