DMG-CPU-Inside
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furrtek
Reverse-engineered schematics for DMG-CPU-B
On page 16, the inverter `FEVO` should be connected to the `Q` output of DTFF `GUXE`, not its `!Q` output. For the NOR gate `FUVO` the opposite is true: It...
On page 15, the AND gate `KYVO` should have its 3rd input connected to the `COUT` output of counter cell `JORE`, not the `!Q` output.
On page 15, there are no labels on the outputs of the four gates that produce the channel's output. For channel 1&4 those outputs are labelled `CHn_OUTb` (n=channel#, b=bit#). I...
On page 14, tribuf `GERO` outputs into `D4` and `GAKY` outputs into `D5`, not the other way around.
On page 14, the input of tribuf `FOSE` should be connected to the `!Q` output of counter cell `CYVO`, not the `COUT` output.
On page 5, the output of ``KALE`` is wrongly labelled ``P13_C``, it should be ``P13_D``. On the same page, the outputs of ``KOLE`` and ``KYTO`` are wrongly labelled ``P10_B`` and...
Sortie de KOLE connectée à P10_A. Sortie de KYTO connectée à P11_A. Sortie de KALE connectée à P13_D.
On page 11, the inverter ``KYPE`` should be connected to the ``!Q`` output of counter cell ``KYNA``, not to its ``COUT`` output.
On page 5, input 1 of ``KASY`` should be connected to Q output of ``JALE`` or input 1 of ``KYHU``. I think you messed it up because you accidentally mirrored...