Mike Thompson
Mike Thompson
> Out of curiosity, which coprocessor did you use to test the interface? The CV-X-IF is a recent addition to the CVE2 and has yet to be fully verified. We...
Hi @kasunb-accelr, thanks for this PR. Adding support for Questa would be a significant addition. Some of your suggested updates are significant, and we will need several people to review...
Hi @AyoubJalali, this is a well known problem in verification environments that compare results generated by a reference model and an RTL model that use different abstractions of "time". In...
Thanks for the detailed explanations @AyoubJalali and @zchamski. This aligns with my understand as well. Let me see if I can put it another way. In this example: - The...
...what about check for correct behaviour?
> For precise tandem simulation of interrupts we need a similar checker of interrupt notifications coming from the RVFI. In parallel, the current implementation of method Processor::step() (CVV: vendor/riscv/riscv-isa-sim/riscv/Proc.cc) needs...
Removing original assignee as they are no longer assigned to this project.
> PMP reads and writes are allowed even when no PMP entry is present (NrPMPEntries = 0). Is this intended ? Section 2.1 of the unprivileged spec says, `Attempts to...
Hi @Uzair-90, I deliberately merged in your PR (#2631) knowing that it would create a merge conflict. Once you've indicated that your PR resolves #2630, I will fix the conflicts...
OK @Uzair-90, I have resolved the merge conflict. Please have a look (and thanks!).