Mike Thompson

icon indicating a website link http://www.openhwgroup.org icon indicating an email [email protected]

icon company @openhwgroup icon location Ottawa, Ontario, Canada icon location Functional verification of RTL for ASICs and FPGAs. Sole Proprietor at Covrado and Director of Engineering, Verification Task Group at the OpenHW Group.

Results 646 comments of Mike Thompson

[uvms_axi5] issue while compile the axi_agent with questasim

Hi @khandelwaltanuj. Can you provide us with the exact command lines you used to produce these errors? Please start with `git clone...`.

[uvms_axi5] issue while compile the axi_agent with questasim

Hi @ludovicpion, I am currently traveling for work and do not have access to Questa. Can you help out @khandelwaltanuj?

[uvms_axi5] issue while compile the axi_agent with questasim

Hi @AyoubJalali , I am currently traveling for work and do not have access to Questa. Can you help out @khandelwaltanuj?

Bug : PMPCFG.A field

See also [CVA6 #2024](https://github.com/openhwgroup/cva6/issues/2024).

Bug : PMPCFG.A field

`pmpcfg.A` is a WARL field and Section 2.3 **CSR Field Specifications** of the privileged spec says: ``` Implementations will not raise an exception on writes of unsupported values to a...

Bug : PMPCFG.A field

> BTW, riscv-config supports arbitrary lists of legal values Indeed. Check out the [WARL Node Definition](https://riscv-config.readthedocs.io/en/latest/yaml-specs.html#warl-node-definition) section of [RISC-V Config](https://github.com/riscv-software-src/riscv-config). Specifically the part about `wr_illegal`. It seems that RISC-V Config...

WT dcache questions?

Hi @sjthales, this Issue is almost a year old, so either you received your answer, or it does not matter anymore. Either way, we need to move this Issue forward....

Clarification on ECALL instruction

Hi @christian-lanius, a lot of RISC-V testbenches use `ecall` to terminate a simulation and this was added to the CVA6 testbenches some time ago. It is a bad practise as...

Verification goal for FENCEI feature in CVA6 DV plan

Hi @YoussraBELAMKADEM, what is the status of this Issue?

DSim-compatible updates for CV32E20

Hi @zchamski and @AyoubJalali, I am hoping that you can both spare some time to review this PR. These are changes that _should not_ affect CVA6, but I want to...