Mike Thompson

Thanks for your interest in CORE-V-VERIF @deepeshsahoo. You are right. The immediate fix for this is: ``` @@ -531,7 +531,7 @@ vcsify: CV_CORE_pkg tbsrc_pkg tbsrc -timescale=1ns/1ps \ -assert svaext \...

We do not (yet) support logging of the CSR updates. This has long been on our ToDo list, and a PR to add it would be welcome.

Nice! Would you be willing to submit a pull-request for this? You would need to sign the [Eclipse Contributor Agreement](https://www.eclipse.org/legal/eca/) - don't worry it is painless and easy.

Please review [CONTRIBUTING](https://github.com/openhwgroup/core-v-verif/blob/master/CONTRIBUTING.md) for the details regarding how to submit a pull request.

This looks similar to #2393. The root cause of that issue is a bug in older versions of VCS. For a long time we had a kludge in place as...

It is odd that we do not see this error since we are using _almost_ the same version of VCS. Would you be willing to contribute a PR so we...

Hi @murattokez, you are deep into the weeds of the core-v-verif environment now! :rofl: If you change the boot address of the test-program, you must also change the value of...

I suspect the problem is with your linker control script. Have a look at the `readelf` and `objdump` files. They will be located in `cv32e40p/sim/uvmt/_results/default/hello-world/0/test_program/`. Please note that unless you...

0x80000000 is the default value driven onto the core's `boot_addr_i` input vector.

Ack. Sorry, you are right. (I am currently doing some work with Spike and its default boot address is 0x80000000 and I mixed up the numbers...)