asic topic
dss
Digital Signature Service : creation, extension and validation of advanced electronic signatures
rggen
Code generation tool for control and status registers
PoC
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
DMG-CPU-Inside
Reverse-engineered schematics for DMG-CPU-B
cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
tensil
Open source machine learning accelerators
logic
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.