asic-verification topic

Awesome ASIC design verification

troyguo

I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. A single-path delay commutator processing element (SDC PE) has...

abdelazeem201

IC implementation of Systolic Array for TPU

abdelazeem201

Quasar 2.0: Chisel equivalent of SweRV-EL2

Lampro-Mellon

Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments

wyvernSemi

VIP for AXI Protocol

kumarrishav14