silabs-robin
silabs-robin
Relates to https://github.com/openhwgroup/core-v-verif/issues/1195 and https://github.com/openhwgroup/core-v-verif/issues/1192
Hi @ZElkacimi. I have made an example "testbench" for using this assert-assume macro. (First, I tried to "git cherry-pick" to get access to the cvxif assertions, but that got messy...
The macro should preferably be somewhere in the `core-v-verif/lib/` directory. We should also try to merge the cva6 dev branch with master soon! It would benefit us all if we...
Hi @JeanRochCoulon. I wanted to continue the Mattermost discussion about excel vplan reviews. Is it ok to continue it here on github, so we have a later reference to the...
@JeanRochCoulon, @MikeOpenHWGroup, I tried to think about how this would work in yaml. Below is a fraction of the xif vplan written in yaml, just as an experiment to see...
@silabs-hfegran this PR should be ok to merge now, IMO. Please read the below explanation and see if you agree or not. -------- The test induces ISS mismatching. But as...
Hi. A related thing about the template (thought not directly about this issue) that I want to mention. We have test types "Directed Self-Checking" and "Directed Non-Self-Checking". But wouldn't it...
Another idea. Sorry, not about "pass/fail criteria" but this thread is already on the topic of vPlan methodology. Filenames could (_if it is not burdensome_) have a [semantic versioning](https://semver.org/) suffix,...
Thanks @silabs-kun. This seems very related to the other error, "a_deny_only_illegal".
I just noticed. This issue was opened on the wrong repo. The errors above are from "core-v-verif", but this is the "cv32e40s" repo.