cheshire

cheshire copied to clipboard

AXI version `v0.39.4` breaks Linux boot

1

It seems that the `axi_id_serialize` updated in `v0.39.4` axi release prevents Linux from booting properly on cheshire - FPGA port; my educated guess comes from these three CIs: * bumping...

alex96295

Xilinx U280 FPGA support

1

Hi, I am wondering how difficult it would be to deploy Cheshire on an Xilinx U280 FPGA. Look like it shares the same FPGA as vcu128. Is it possible for...

hanyax

I have noticed that the current submodule of `printf` points to a repository which is no longer mantained (see https://github.com/mpaland/printf/issues/128). Instead, a fork of it is currently the most up-to-date...

ricted98

Add support for the Ara vector processor in Cheshire. To be merged in `main` as soon as cva6 `pulp-v2` is also integrated into `main`.

mp-17

See the [flamingo](https://github.com/pulp-platform/cheshire/blob/flamingo/hw/cheshire_pkg.sv) branch. @ezelioli

paulsc96

Add Verilator fast simulation

10

To use this, run the following commands from the repository root. ``` make "$PWD/target/sim/verilator/cheshire_soc.vlt" ./target/sim/verilator/cheshire_soc.vlt +BINARY=/absolute/path/to/binary.elf ``` ### Performance I have benchmarked this simulation (using Verilator 5.034 and Clang 16.0.6)...

MaxWipfli

This PR add support of FESVR and PK with slink as a preloading method. - FESVR can now be used to run application using DMI interface, connected directly to the...

mtravaillard

The VCU128 uses the following DRAM interface: https://github.com/pulp-platform/cheshire/blob/2d0b8f82356330fc58b32a508a39239de5fcb237/target/xilinx/scripts/impl_ip.tcl#L147 Through Vivado IP Catalog, it includes ECC protection: https://github.com/pulp-platform/cheshire/blob/2d0b8f82356330fc58b32a508a39239de5fcb237/target/xilinx/scripts/impl_ip.tcl#L155 Uninitialized memory location will return data, but can possibly generate SLVERR in RRESP...

ricted98

This PR introduces support for the ZCU104 board as a host platform for the Cheshire prototype. **Main actions:** - Define ZCU104 as a new board with its relevent IPs. -...

AbdelkadirChantar

Add windows support

4

This PR adds the ability to compile test software, synthesize and simulate on windows platform through WSL2.

HepoH3