cheshire

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ToDo: * [x] Add missing commits * [x] Rebase after FPGA merge * [x] Clean up existing codebase * [x] Move control to regbus, verify * [x] Verify everything still...

thommythomaso

treewide: Add clic virtualization support

1

* Bump CLIC to support virtualization * Bump CVA6 accordingly

alex96295

Improving Cheshire's fault-tolerance with the integration of a Hybrid Modular Redundancy (HMR) unit redundant grouping of CVA6.

yvantor

Leaving away the default-enabled `RegAmoPostCut` causes a combinational loop between `axi_riscv_atomics_structs` and `axi_to_reg_v2`. This should be investigated and fixed in either IP.

paulsc96

ci: First Docker setup with `slang` pipeline

1

This is a continuation of #2.

paulsc96

treewide: Add LLC partitioning capability

3

Cheshire with `LLC partitioning` and `Tagger` module integrated.

DiyouS

Update Docker flow

2

`make sw-all` fails for gcc version below gcc version 12.x . [Prebuilt toolchain](https://github.com/pulp-platform/cheshire/blob/main/.github/Dockerfile#L13l) used in Dockerfile for workflow also fails. Suggest to use prebuilt from [here](https://github.com/stnolting/riscv-gcc-prebuilt/releases/download/rv64imc-3.0.0/riscv64-unknown-elf.gcc-12.1.0.tar.gz) or build from [source](https://github.com/riscv-software-src/riscv-tools/)

disdi

This PR contains some modification to the Cheshire software stack to ease bare-metal SMP. The following modifications are pushed: - move `smp_pause` and `smp_resume` to the bootrom crt0.S file, renaming...

emanueleparisi

thommythomaso

https://github.com/pulp-platform/cheshire/pull/58 causes the ZSBL on FPGA to execute noticeably longer (1-2 mins), requiring to increase the CI's log delay. Investigate the possible reasons, e.g. - [ ] Cache functionality (L1/LLC)...

niwis