CyrIng
CyrIng
Quoting the Scalable/X datasheet volume 2: > For Device 10 and 12 Functions 0-5 for offsets >= 256, PCIe extended configuration space are not designed for direct usage by OS...
Refreshing the old and unsolved issue #146 My notes: [Source](https://elixir.bootlin.com/linux/latest/source/drivers/edac) codes of interest: * skx_base.c * i10nm_base.c `I10NM_GET_IMC_BAR` base address resolved in function [`i10nm_get_ddr_munits`](https://elixir.bootlin.com/linux/latest/source/drivers/edac/i10nm_base.c#L234) @wwyf : if you read the...
* [6th Generation Intel® Core™ Processor Family Uncore](https://www.google.com/url?sa=t&source=web&rct=j&url=https://www.intel.com/content/dam/www/public/us/en/documents/manuals/6th-gen-core-family-uncore-performance-monitoring-manual.pdf&ved=2ahUKEwimkoGMot71AhUKy4UKHULTBpgQFnoECCIQAQ&usg=AOvVaw2r1Zdc3RP3FTpgOYgvYlGn) > To obtain the BAR address, read the value (in PCI configuration space) at Bus 0; Device 0; Function 0; Offset 48H...
IMC Timings still not found, but DRAM Power could be improved. This register is not implemented yet in _CoreFreq_  _Edit:_ can you dump its value ``` rdmsr -ax 0x61C...
> Got it. I will have a try. Be aware `Skylake/X` is crashing with `master` branch, and I believe your `Cascade Lake/X` is having the same registers set. Please check...
> Hi, > > This is the output of the program on my Ryzen 7 5800H Thank you very much. zencli is decoding 2 DIMMs 4GB each. Is this what...
> > > Hi, > > > This is the output of the program on my Ryzen 7 5800H > > > > > > Thank you very much. >...
@nhattu1986 Thanks. Something I don't understand with this APU which queries no UMC data from driver.
@nhattu1986 Can you try UMC again but make sure **without** the `Experimental` parameter. Like: ``` insmod corefreqk.ko corefreqd ``` ``` corefreq-cli -M ```
> > @nhattu1986 > > Can you try UMC again but make sure **without** the `Experimental` parameter. > > Like: > > ``` > > insmod corefreqk.ko > > corefreqd...