chisel

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Incorrect Error Message in Data.connect(...)

9

In https://github.com/freechipsproject/chisel3/blob/master/chiselFrontend/src/main/scala/chisel3/Data.scala#L377: ```.scala requireIsHardware(this, "data to be connected") requireIsHardware(that, "data to be connected") ``` The first error message is incorrect. It should be something like `left hand side of the...

ekiwi

Speed up ci

2

We need to just do https://github.com/chipsalliance/chisel3/pull/2043, but I want to see if some tests take a lot longer than others ### Contributor Checklist - [ ] Did you add Scaladoc...

jackkoenig

This is an automatic backport of pull request #2585 done by [Mergify](https://mergify.com). Cherry-pick of 9fcfb252beb9f06d8d1409fe7db9c8b3b6b962ce has failed: ``` On branch mergify/bp/3.4.x/pr-2585 Your branch is up to date with 'origin/3.4.x'. You...

mergify[bot]

Fix verilog vs chisel doc rendering

6

**Type of issue**: bug report | documentation **Impact**: no functional change **Development Phase**: request **Other information** **If the current behavior is a bug, please provide the steps to reproduce the...

debs-sifive

Implement module prefix API

1

### Contributor Checklist - [x] Did you add Scaladoc to every public function/method? - [x] Did you add at least one test demonstrating the PR? - [x] Did you delete...

jared-barocsi

### Contributor Checklist - [ ] Did you add Scaladoc to every public function/method? - [ ] Did you add at least one test demonstrating the PR? - [ ]...

azidar

**Type of issue**: documentation **Impact**: no functional change **Development Phase**: request **Other information** **If the current behavior is a bug, please provide the steps to reproduce the problem:** Because `prefix`...

mwachs5

.suggestName and .autoSeed change the prefix even when they don't change the "local name"

1

This is a weird one that is almost certainly usually a feature but can give some very strange behavior Consider the following: ```scala class Example extends Module { val foo,...

jackkoenig

Reflective naming will override the name given by naming plugin

1

Consider ```scala class Example extends Module { val foo, bar = IO(Input(UInt(8.W))) val out = IO(Output(UInt(8.W))) val sum = foo + bar dontTouch(sum) // Reflection here overwrites the name of...

jackkoenig

Better instantiation and inference of SyncReadMem

1

**Type of issue**: feature request **Impact**: API modification **Development Phase**: proposal **Other information** **If the current behavior is a bug, please provide the steps to reproduce the problem:** **What is...

poemonsense