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Chisel: A Modern Hardware Design Language

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**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** The code below defines a Bundle with type parameters and four fields, all resolving to type `Bool()`....

bug

Converting some tests to ChiselSim, I've noticed the tests run about 20x slower than chiseltest. As a comparison, running on ChiselSim: ``` ❯ time ./mill chiselv.test.testOnly chiselv.ALUSpec [86/86] chiselv.test.testOnly ALUSpec:...

This is a first attempt for generating and propagating scala source language type information to CIRCT https://github.com/chipsalliance/chisel/issues/4015. This PR adds a new option to support the new backend of my...

**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** Consider these tests: https://github.com/dtzSiFive/chisel3/commit/d8a3f1213c32a9e69fd6e15eaf4c9030ce2235fb . Steps to reproduce are to checkout that branch / apply that commit...

Fixes https://github.com/chipsalliance/chisel/issues/4218 One can question the need for this, as it's just making `` not error in a few more cases. The main motivation is that https://github.com/chipsalliance/chisel/pull/4205 causes some existing...

Bugfix

In https://github.com/chipsalliance/chisel/pull/2634, we unified the Chisel 2 and Chisel 3 direction semantics, making it legal to have Records where the directionality of elements is mixed (some may be specified, some...

Bugfix

## About this PR 📦 Updates [com.lihaoyi:upickle](https://github.com/com-lihaoyi/upickle) from `3.3.0` to `3.3.1` 📜 [GitHub Release Notes](https://github.com/com-lihaoyi/upickle/releases/tag/3.3.1) - [Release Notes](https://com-lihaoyi.github.io/upickle/#VersionHistory) - [Version Diff](https://github.com/com-lihaoyi/upickle/compare/3.3.0...3.3.1) ## Usage ✅ **Please merge!** I'll automatically update this...

**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** Consider the following Chisel: ```scala //> using scala "2.13.12" //> using dep "org.chipsalliance::chisel:6.4.0" //> using plugin "org.chipsalliance:::chisel-plugin:6.4.0"...

Enable MiMa for v3.6.1

Internal

**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** Consider the following Chisel: ```scala //> using scala "2.13.12" //> using dep "org.chipsalliance::chisel:6.4.0" //> using plugin "org.chipsalliance:::chisel-plugin:6.4.0"...