Fabien Marteau

testbech -> testbench

Is there a diagram of the CLBs used in the CLEAR 8x8 matrix?

Hello, What is the signification of CLEAR ? Is it an acronym ?

Hello, I'm trying to flash the simple blinking example given [here](https://github.com/efabless/clear/tree/main/firmware/blink). I've managed to compile blink and configure caravel with `flash` target : ```bash $ make generating hex for [blink]...

Use Raptor on CLEAR

1

Is there configuration and example to develop on CLEAR FPGA with Raptor ? https://github.com/efabless/clear/ Clear is an eFPGA generated with [openFPGA](https://github.com/lnis-uofu/OpenFPGA) and included in [caravel](https://github.com/efabless/caravel).

As I can see in [pcf files](https://github.com/efabless/OpenFPGA_bitstream_generation/tree/SOFA/openfpga_flow/tasks/SOFA_tasks/pcf_files) directory clock is usually connected on pin 37 : ``` $ cd openfpga_flow/tasks/SOFA_tasks/pcf_files $ rg "clk" counter.pcf 1:set_io clk gfpga_pad_io_soc_in[37] adder.pcf 1:set_io clk...

Is this project being abandoned?

1

I ask some questions without any response, is this project being abandoned ? Thanks

Is it possible to use accent for displaying text with string ?

6

I'm trying to simulate following simple report program with nvc : ```VHDL library ieee; use std.env.finish; --VHDL-08 entity exemples_string is end exemples_string; architecture behavioral of exemples_string is begin process constant...