mipt-mips
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MIPT-ILab
Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
Rebased from #1451 Now when you want to log operations to JSON file - you need to add flag -j or --json-dump and logs will be saved to your current...
[Clang-Format](https://clang.llvm.org/docs/ClangFormat.html) is a tool to format code automatically according to some guidelines. Your objectives are: - [ ] define `.clang-format` file for our project, reflecting our [guidelines](https://github.com/MIPT-ILab/mipt-mips/wiki/Code-style-guidelines) - [ ]...
GNU Debugger (GDB) is a popular tool used for runtime debugging of software. However, MIPT courses are not focused on debugging much. The idea is to have a simple "flight...
MIPT-MIPS execution uArch defines [3 three categories of instructions]( https://github.com/MIPT-ILab/mipt-mips/wiki/Data-Bypass-and-Scoreboard#non-unified-pipeline): 1. Simple arithmetic 1. Branches/memory instructions 1. Multi-cycle arithmetic Currently MIPT-MIPS behaves as follows: 1. Simple arithmetic is always 4...
#1452 delivers JSON output of pipeline stages. It should be covered with tests to simplify refactoring and eliminate observed bugs.
RISC-V Bit Manipulation instructions often have ".*W" companion which operate on 32-bit registers in 64-bit mode. Your goal is to implement these instructions using existing code.
Currently MIPT-V collects statistic inside a "core" module and dumps it unconditionally. The idea is to wrap `uint64` counters to a class which provides access to them for write, but...
Some RISC-V instructions perform writes to 2 destinations, either 2 register or register or program counter. In cases if the source of one sub-operation matches a destination of another one,...