branch-prediction topic

Go library providing algorithms optimized to leverage the characteristics of modern CPUs

segmentio

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

MIPT-ILab

💻 RISC-V Simulator of RV32I ISA. 5-stage pipeline / out-of-order execution with Tomasulo algorithm and Speculation. Support runtime visualization. Project report available.

skyzh

32-bit Superscalar RISC-V CPU

ultraembedded

Super scalar Processor design

sdasgup3

Advanced Architecture Labs with CVA6

sifferman