Jonathan Balkind
Jonathan Balkind
My guess is this could just be an endianness issue. Usually when we are using PCIe-based DMA, we also end up changing the endianness of the file before performing the...
I have to say that I disagree with the suggestion we should be embracing interfaces. When this was discussed in the CVA6 meeting, there were multiple responses from OpenHW members...
IIRC the perf.log file is only used for the OpenSPARC T1 core. As it is now, we don't have a mechanism to check which core is in use and avoid...
I think I see two main issues here: 1. I think the test you're running is the 32 bit riscv test for PicoRV32, not 64 bit for Ariane? - If...
Do you mean the .riscv file (I think that's the extension)? To the best of my knowledge, it should be, yes. You can use -precompiled to run that test. I...
Bad trap corresponds with the core's PC going to the "fail" label in the program's binary. You should be able to use your riscv64 objdump (or check diag.dump) to see...
Thanks Alex! This is great :) There's a lot in here (my browser freezes reading the "files changed" tab) and I'm wondering how we can scale this down to make...
Ok that all sounds good. I think going for a squash at merge time is reasonable so let's assume that we'll do that. Thanks!
After 64 tiles there are a couple of blockers: 1. By default, the L2's share vector (which sets the maximum number of tiles) is set to 64. You will need...
I don't think this is important. My recollection is that SDID is unused when NO_RTL_CSM is set, which is the case for all cores except the OST1. LSID is used...