Jonathan Balkind

Sure! The BYOC extension of OpenPiton (https://parallel.princeton.edu/papers/aspl20-balkind.pdf https://github.com/bring-your-own-core/byoc) enables exactly this. That's how Ariane was connected. We've connected something like 15 cores with varying degrees of capability at this point....

Our device tree is automatically generated for the correct number of cores based on what you compile. You shouldn't need to manually edit the device tree to change the core...

There isn't any arbitration insofar as each L2 has its 3 NoC connections and messages arrive in order according to network routing. Between the NoCs there is a fixed priority...

VERILATOR_ROOT is a path. If you set its value to the location of the source code (i.e. the directory you get when you untar the tarball), then it should seemingly...

For the Genesys2 board, we've primarily used the external JTAG debugger. I think for VCU118 and some other boards we would have to use bscane2. We haven't used it yet...

As I say, we haven't tried this out yet. If it's saying the instance is in use, then I might guess that you may need to change the value for...

All I have are some pointers I was given previously but haven't had the chance to follow up on. The PR adding support to OpenOCD has since been included, so...

I think on Genesys2 we can use the FT2232H JTAG chip's second channel because there's a second chain wired up to the FPGA for that channel. For VCU118 I can't...

@grigoriy-chirkov I'm looking at the definition of the `ADDR_TRANS_PHYS_WIDTH_ALIGN` macro and wondering if Michael chose the wrong ones here. What do you think? https://github.com/PrincetonUniversity/openpiton/blob/3eefdef42e03d1df14242e551cda2ef8c964bcf6/piton/design/chipset/include/chipset_define.vh#L78-L90 At some point the shifts were...

`vlog` is the unhelpful name for ModelSim(/Questa). You'll need to run a different command from `-msm_build` and `-msm_run` if you want to use a different simulator. I thought this was...