Jonathan Balkind

Did you modify piton/tools/src/proto/block.list and the Xilinx IPs (clk_mmcm, UART, and atg_uart_init) to correspond with your frequency change?

You need to flick the pitonstream switch. Whichever one it is that gets rid of the "DONE" print. I haven't used the vcu118 so I don't know exactly which one...

When Michael was setting up the board he reduced the SD clock frequency from the clk_mmcm module to something like 8MHz. I don't remember whether that change is included in...

Thanks for bringing this up! We were recently trying to work out what the minimal set of packages actually is and what the equivalents are on Red Hat variants to...

I'm not quite sure what you're asking for. The chip bridge is turning three 64 bit networks into a single 32 bit link. In the NO_CHIP_BRIDGE case, those three links...

When you say "core", what exactly do you mean? It doesn't make sense to "bypass" the crossbar etc if you want that core to talk to other devices/cores. You can...

We don't have support for the proxy kernel built in, though stubs of what you would need to implement for use in simulation are there. Michael worked on this a...

The coherence protocol isn't undergoing any really significant changes. It's been mostly static since the OpenPiton+Ariane release. You can see some documentation on openpiton.org in the microarch spec (though it...

Just seeing this now (broken email notification settings) and I assume you probably resolved this already. I'll leave an answer for posterity: Page 40 of the microarchitecture specification explains the...

At present we don't have a great simulation-only environment for this. For FPGA, we can make use of AXI-based infrastructure to hook up NVDLA on a crossbar to memory, but...