Jonathan Balkind
Jonathan Balkind
When you lower the frequency, you need to also change the frequency for your board in block.list as this gets passed to the bootrom generation (and the bootrom needs to...
Can you try using pitonstream (add `--uart-dmw ddr` to protosyn and flip the appropriate DIP switch)? That would let you check if the design is otherwise working and potentially narrow...
I have a hunch that this is due to the transitioning of pitonstream to python3. We didn't test everything thoroughly and so it may just be printing the string in...
@olofk could you take a look at this? We would really like it to land for some openpiton stuff we're doing
I'm not so sure about adding that restriction, Florian. With the way PMAs have to be specified it is easier to set all non-main-memory as NC+NI. Saying you can't execute...
Between debug units and things like our hardware SD driver, I think executing from NI isn't that abnormal. I would consider a change to specifically disallow this to be a...
I'd suggest you could try using an AXI downsizer like the one provided by PULP (or a Xilinx IP) https://github.com/pulp-platform/axi/blob/master/src/axi_dw_downsizer.sv
I believe (as noted above) that they were opening the wrong tty when running pitonstream?
I think we'd all love to see that if you're willing to give it a go :)
There was already an existing task for this https://github.com/openhwgroup/cva6/issues/1233