Readon

For the priority, as it is coded ``` scala def setWhen(cond: Bool)(implicit loc: Location): Bool = { when(cond){ this := True }; this } def clearWhen(cond: Bool)(implicit loc: Location): Bool...

Is that possible to have ollama determine the VRAM it uses? May be one possible way is by retrying but directly terminate the program.

> We've recently fixed VRAM prediction calculations for mixtral. Please give the latest RC of 0.1.33 a try and it should be fixed. > > https://github.com/ollama/ollama/releases It works really good....

that would be great if there are SpinalHDL/Verilog/SystemVerilog/VHDL，user can easily compare and study by that. However, it's necessary to make that happen. ---Original--- From: ***@***.***> Date: Thu, Nov 17, 2022...

One possible way is to define an alternative interface which accept BitCount but Int as parameter, so that there definition could be different and remains the old code works either....

Or even more, we could have a user define Bundle for user data which could be placed at the wires that userWidth originaly specified.

> * Add a `SingleBitArrayCDC` (better naming ideas are welcome) for the specific case of multiple bits that need not be coherent. If this refer to a multicycle handshake mechanism...

I think it would be fixed by #976

> To elaborate a bit, the purpose is to have the following trigger `CLOCK CROSSING VIOLATION`: > > ```scala > val monArea = new ClockingArea(monClock) { > val fire =...

> I have a problem with using Stream Mux with the `createSelector` helper when using this factoy > > ```scala > def apply[T ``` > > this is using this...