Vitor Antunes

Currently not at the pc so can't confirm, but if I remember correctly ctags arguments order matters. Try moving the *.sv to the end of the command.

Hi, I'm sorry, you are correct: Universal Ctags is still skipping the contents of structs. Give me a week or two to take care of that. Vitor

This is taking longer than I'd hoped... being a recent dad is not helping out on the free time ;)

Example `syntime report` for a huge gatelevel netlist: ``` TOTAL COUNT MATCH SLOWEST AVERAGE NAME PATTERN 51.441354 4999387 72 0.000186 0.000010 verilogObject \\s*:\s*\)\@20 9.369328 2825239 0 0.000193 0.000003 verilogProperty \...

Did some initial work to support that by including a new keyword for `g:verilog_disable_indent_lst` "standalone". Could you please checkout the branch indent/standalone_blocks and give it a try? Thanks!

That is intentional because the variable defines the list of indents we want to *disable*, so it has inverted behavior. I've included it in the default list, but you noticed...

Could you provide some examples of what's still broken?

Added new variable `verilog_indent_block_on_keyword` that should enable the behavior you are looking for. Please try and provide feedback. Thanks.

I can't replicate this behavior. Do `:let g:verilog_verbose=1` and then press == in on of those `end` keywords. Then do `:messages` and copy&paste the result here.

This is real strange. I've updated the branch to increase the verbosity of the message (you may have to reset your branch). Could you share the message again? Could you...