Improve syntax performance

[vhda]

This issue has the purpose of tracking any reported syntax performance issues. New issues should be added as a comment and I will update the list accordingly. Please provide example code whenever possible.

• [x] Poor performance in when there is a fold that occupies the complete file - Vim limitation, can be overcome using FastFold plugin.
• [ ] Introduce new global variable to disable the slower syntax elements.
• [ ] Try to optimize performance of slower syntax elements, as reported in https://github.com/vhda/verilog_systemverilog.vim/issues/42#issuecomment-339358463, below.

[vhda]

Example syntime report for a huge gatelevel netlist:

  TOTAL      COUNT  MATCH   SLOWEST     AVERAGE   NAME               PATTERN
 51.441354   4999387 72     0.000186    0.000010  verilogObject      \<\w\+\ze\(::\|\.\)
 49.022334   4999387 0      0.000200    0.000010  verilogMethod      \(^\s\+\.\)\@30<!\<\w\+\ze(
 44.597425   27056628 25510485   0.000180   0.000002 verilogOperator [&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]
 36.859308   4999387 0      0.000185    0.000007  verilogNumber      \(\d\+\)\?'[sS]\?[hH]\s*[0-9a-fA-F_xXzZ?]\+
 35.902144   4999387 0      0.000179    0.000007  verilogNumber      \(\d\+\)\?'[sS]\?[dD]\s*[0-9_xXzZ?]\+
 35.694525   4999387 0      0.000172    0.000007  verilogNumber      \(\d\+\)\?'[sS]\?[oO]\s*[0-7_xXzZ?]\+
 35.629999   4999387 0      0.000183    0.000007  verilogNumber      \(\d\+\)\?'[sS]\?[bB]\s*[0-1_xXzZ?]\+
 31.218078   2825239 0      0.000194    0.000011  verilogLabel       \(\<begin\>\s*:\s*\)\@20<=\<\k\+\>
 28.799353   15186816 10245089   0.000163   0.000002 verilogConstant \<[A-Z][A-Z0-9_$]*\>
 26.698054   4999387 0      0.000180    0.000005  verilogStatement   \(typedef\s\+\)\@<=\<class\>
 21.815554   2825239 0      0.000183    0.000008  verilogAssign      [^><=!]\zs<\?=\(=\)\@!
 19.173218   2825239 0      0.000182    0.000007  verilogLabel       \<\k\+\>\ze\s*:\s*\<\(assert\|assume\|cover\(point\)\?\|cross\)\>
 17.882582   5033631 34543   0.000169   0.000004  verilogNumber      \<[+-]\?[0-9_]\+\(\.[0-9_]*\)\?\(e[0-9_]*\)\?\>
 17.608403   4999387 0      0.000178    0.000004  verilogNumber      \<\d[0-9_]*\(\.[0-9_]\+\)\=\([fpnum]\)\=s\>
 14.108759   2825239 0      0.000181    0.000005  verilogPrototype   \(\(extern\s\+\(\(pure\s\+\)\?virtual\s\+\)\?\|pure\s\+virtual\s\+\)\(\(static\|protected\|local\)\s\+\)\?\)\@<=\<\(task\|function\)\>
 13.604422   2825239 0      0.000170    0.000005  verilogTask        \(\(extern\s\+\(\(pure\s\+\)\?virtual\s\+\)\?\|pure\s\+virtual\s\+\)\(\(static\|protected\|local\)\s\+\)\?\)\@<!\<task\>
 13.099390   2825239 0      0.000171    0.000005  verilogFunction    \(\(extern\s\+\(\(pure\s\+\)\?virtual\s\+\)\?\|pure\s\+virtual\s\+\)\(\(static\|protected\|local\)\s\+\)\?\)\@<!\<function\>
 10.851914   2825239 0      0.000171    0.000004  verilogAttribute   \(@\s*\)\@<!(\*
 10.821048   2367385 0      0.000169    0.000005  verilogInterface   \(\<virtual\s\+\)\@<!\<interface\>\(\s\+class\)\@!
 10.277672   2825314 1084850   0.000184   0.000004 verilogInstance   ^\s*\zs\w\+\(\s*#\s*(\(.*)\s*\w\+\s*;\)\@!\|\s\+\(\<if\>\)\@!\w\+\s*(\)
  9.506102   2825239 0      0.000167    0.000003  verilogClass       \<\(typedef\s\+\)\@<!\(interface\s\+\)\?class\>
  9.369328   2825239 0      0.000193    0.000003  verilogProperty    \<\(\(assert\|cover\)\s\+\)\@<!\<property\>
  9.235188   2825314 76     0.000194    0.000003  verilogModule      \<\(extern\s\+\)\@<!\<module\>
  3.006565   4999387 0      0.000160    0.000001  verilogStatement   interface\ze\s\+class\>
  2.751286   4999387 0      0.000162    0.000001  verilogStatement   \<interface\>
  1.539815   2825239 0      0.000159    0.000001  verilogCovergroup  \<covergroup\>
  1.508792   2825239 0      0.000156    0.000001  verilogExport      \<export\>
  1.457486   2825239 0      0.000160    0.000001  verilogClocking    \<clocking\>
  1.422768   4999387 0      0.000160    0.000000  verilogGlobal      $[a-zA-Z0-9_$]\+
  1.410407   4999387 71     0.000162    0.000000  verilogString      "
  1.366001   4999387 0      0.000155    0.000000  verilogGlobal      `[a-zA-Z_][a-zA-Z0-9_$]\+
  1.340475   4999387 7      0.000153    0.000000  verilogComment     /\*
  1.333899   4999387 784    0.000162    0.000000  verilogComment     //.*
  1.265070   2825239 0      0.000154    0.000000  verilogSpecify     \<specify\>
  1.213657   2825239 0      0.000156    0.000000  reusePragmaFold    ^\s*\(#\|\/\/\)\s*\<reuse-pragma startSub\>\s\+\z(\w\+\)\s\+.*\(\<endSub\>\)\@!$
  1.144285   2825239 0      0.000156    0.000000  verilogSequence    \<sequence\>
  0.952868   3257199 1060612   0.000155   0.000000 verilogInstance   ;
  0.816258   2825239 0      0.000158    0.000000  ledaFold           ^\s*\/\/\s*leda\s\+\z(\w\+\)\s\+off
  0.744798   3078849 1336662   0.000159   0.000000 verilogExpression (
  0.718405   2825239 0      0.000160    0.000000  verilogDirective   //\s*\$s dc_script_begin\>
  0.707836   2825239 0      0.000153    0.000000  verilogDirective   //\s*synopsys \z(\w*\)begin\>
  0.673086   2825239 0      0.000152    0.000000  verilogDirective   /\*\s*\$s\>
  0.660520   840924 0       0.000158    0.000001  verilogModule      \<endmodule\>
  0.659084   2825239 0      0.000160    0.000000  verilogDirective   /\*\s*synopsys\>
  0.657921   2825239 0      0.000159    0.000000  verilogDirective   //\s*\$s\>.*$
  0.655825   2825239 0      0.000158    0.000000  verilogDirective   //\s*synopsys\>.*$
  0.117986   457929 0       0.000148    0.000000  verilogEscape      \\\o\o\=\o\=
  0.111175   457929 0       0.000014    0.000000  verilogEscape      \\[nt"\\]
  0.036782   133315 124163   0.000005   0.000000  verilogExpression  )
  0.000001   7      7       0.000001    0.000000  verilogComment     \*/