ddr3 topic
riscv_sbc
A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
ddr3-controller
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
SPD-Reader-Writer
SPD Reader & Writer with Software Write Protection capabilities supporting Arduino and SMBus
BrianHG-DDR3-Controller
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
eddr3
mirror of https://git.elphel.com/Elphel/eddr3
sbc_allwinner_a13
Open hardware compute module with Allwinner A13 (ARM-A8 @1GHz), DDR3 (max 512MB) and expansions (USB, GPIO, WiFi, LCD, Audio)
UberDDR3
Opensource DDR3 Controller