Olof Kindgren

This is actually by design. Efinity is only implementing the new Flow API rather than the old Tool API. There are a number of benefits to this new API and...

I am currently refactoring the Vivado flow to increase the flexibility and avoid unnecessary rebuilds. Once that is done, it should be straight-forward to add an option to skip the...

I have been thinking about this issue since almost the start of FuseSoC, so I have plenty of ideas but not yet an implementation :) There are a couple of...

Forgot to mention! I did a proof of concept doing pretty much this, but for Xilinx ISE, where I wrote a generator that got cgp files as input, ran coregen,...

Appreciate you reaching out. I think this does need some planning and scoping. E.g., is the intention to create RTL from a bd file or are you looking at some...

I would very much like to have cxxrtl support added so I'm happy to add this functionality. Implementation-wise I would like to be more explicit though than just assuming cxxrtl...

Yes, that is a known issue. Currently, the vivado backend runs in project mode while xsim runs in non-project mode. My proposal is to convert the xsim backend to run...

Ok, so after reading through almost 40000 lines of the build log, I found the error at line 39992 `[ERROR GRT-0229] Vertical edge usage exceeds the maximum allowed.` OpenLANE simply...

No. It just hasn't got the docker image cached and needs to download it

Yes. I actually have this problem myself. It's the riscv-config package (which is a dependency of riscof) which has a strict dependency on pyyaml 5.2. I'm actually using a modified...