vscode-verilog-hdl-support
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mshr-h
HDL support for VS Code
I have install ctags and use ctags success in commander, hover mouse on interface definition. "Go to definition" doesn't work.  The feature enable when i copy all interface definition...
I have tried with modelsim student 10.4 and the intel 20.1 version. I am on Windows 10 x64. No matter what I do, in the output of the extension I...
**Describe the bug** I've got universal-ctags installed, When I ctrl+click a module defined in another file, or reference a module defined in another file, the editor won't take me there...
Is there a folding feature for SV/Verilog ? Let's say I want to collapse an if/else block or a class/endclass, how can I do this?
It would be awesome if your code supported [Google's verible](https://github.com/google/verible). Verible is a suite of developer productivity tools for SystemVerilog code bases including; - Linter - Autoformatter - Kythe integration...
**Describe the bug** When I was trying to use modelsim to lint a file, the extension gave wrong parse result: **Environment:** - OS: Windows_NT x64 10.0.19043 - VS Code version:...
Would save some typing :rofl:
Is there a way to eliminate the default parameters for verilator linting? "(The command "--lint-only -I" will be added by the linter by default)." I think I am having problems...
We are at the verge of reaching 50,000 downloads in the marketplace. From this point, I feel it is good to have a structured development plan. The following are a...
