Tim 'mithro' Ansell comments

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                                            Tim 'mithro' Ansell

Import XilinxUnisimLibrary as a test suite?

@alaindargelas - The upstream sim models has been updated with the missing `verilog/src/glbl.v` file which should make it possible to get further along in the parsing.

Generated Verilog should be more readable

@whitequark Would having access to a bunch of CPU resources help with the randomized testing?

Generated Verilog should be more readable

I could provide pretty much anything on the list at https://cloud.google.com/compute/docs/machine-types Anything like the following might work? * n1-standard-96 * n1-highmem-64 * n1-highcpu-96

Tag tests with parts of a SystemVerilog frontend required

From https://github.com/SymbiFlow/sv-tests/issues/326#issuecomment-542835463 > I think that is a good start. I do think there are even a few more levels like; > > * Synthesis > * Simulation

Tag tests with parts of a SystemVerilog frontend required

@hzeller

Optimise CI workflow and reorganise the content accordingly

It is important from a visibility to have the support architecture directories at the top level.

Can't "make env" on MacOSX

Generation of the docs not on Linux is currently unsupported. You can download a copy of them from workshop.fomu.im We are working on fixing this, but it will be a...

Future: Have section on using Renode + USB bridge

@mgielda

Publish API docs on readthedocs

The most popular tool for doing documentation on ReadTheDocs is Sphinx. See https://docs.readthedocs.io/en/stable/intro/getting-started-with-sphinx.html

Publish API docs on readthedocs

We have a couple of special Sphinx plugins to make it easier to use with Verilog -> http://sphinxcontrib-verilog-diagrams.readthedocs.io/ This is used on the python-symbiflow-v2x docs at https://python-symbiflow-v2x.readthedocs.io/en/latest/