Tim 'mithro' Ansell

LiteX includes a 1bit SPI Flash version here -> https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/spi_flash.py#L114

The issue seems to be that `CSRStorage` has a `def do_finalize` method which is never called. When you add the object as a submodule, the method fails because of a...

I created the following test to demonstrate the issue; ```python #!/usr/bin/env python3 import unittest from migen import * from litex.soc.interconnect.csr import * class CSRModule(Module, AutoCSR): def __init__(self, *args, **kw): self.csr...

If I make the `CSRStorage` object a submodule of `CSRModule` and set `busword=8`, then; ``` test_readwrite_32bit (__main__.TestCSRStorage) ... FAIL test_readwrite_byte (__main__.TestCSRStorage) ... FAIL test_readwrite_byte_alignment (__main__.TestCSRStorage) ... ok test_readwrite_from_dev (__main__.TestCSRStorage) ......

This is the code I came up with for litex's setup.py to check this. ``` python def check_submodules(basedir): try: modules = open(os.path.join(basedir, ".gitmodules")).read() except FileNotFoundError as e: return [] submodule_errors...

I think launching a subprocess (and parsing its output) is likely to be more fragile than parsing the `.gitmodule` files but happy to do which ever version you prefer.

The SymbiFlow fork has been moved to github.com/hdl -- see https://github.com/hdl/Symbolator

@mkurc-ant I probably won't get to this until tomorrow, if you get a chance PTAL and fix the branch.

FYI - @eddiehung

This is how I wanted to use the attribute on a port connection; ```verilog MUX2 rmux ( (* pack = "LUT5toLUT6; LUT5toLUT7; LUT5toLUT8" *) .I0(n5lut_0_out), (* pack = "LUT5x2" *)...