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From: https://github.com/llvm/circt/pull/3351#issue-1271452116 In addition to these changes, I noticed that the two pictures in the folded-vs-unfolded-modules table (at the bottom of [this section](https://circt.llvm.org/docs/FIRRTLAnnotations/#targets)) aren't displaying on the website. I'm not...

documentation
FIRRTL

The following code: ``` module { hw.module @foo() -> (o: i1) { %0 = comb.parity %0 : i1 hw.output %0 : i1 } } ``` is considered correct and produces...

I haven't reduced yet but I have often seen indent around wire/assign broken. For example, in `DivSqrtRecF64_mulAddZ31` module in [FPU.fir](https://github.com/circt/perf/blob/trunk/regress/FPU.fir) compiled with `firtool -drop-names`, there is code like this: ```verilog...

bug
ExportVerilog

## Summary Dedup pass appears to still have a safety issue re:early-inc/post-order iterators over a mutated instance graph. Ran into this using a recent (post-1.4.0) firtool, reported by ASAN. ##...

RemoveUnusedPorts is replaced with IMDCE. A remaining user is circt-reduce which uses `ignoreDontTouch` of RemoveUnusedPorts pass. Once `ignoreDontTouch` is implement by IMDCE, we should remove RemoveUnusedPorts pass from the code...

FIRRTL

`ModuleInliner` pass crashes while creating the annotations with the following input ` circt-opt --pass-pipeline='firrtl.circuit(firrtl-inliner)'` ```mlir firrtl.circuit "CollidingSymbolsReTop" { firrtl.hierpath @nla1 [@Bar::@baz, @Baz] firrtl.module @Baz() { %a = firrtl.wire sym @a...

FIRRTL

The `ModuleInliner` pass crashes with the following MLIR, `circt-opt --pass-pipeline='firrtl.circuit(firrtl-inliner)' ` ```mlir firrtl.circuit "Inliner" { firrtl.hierpath @nla_3 [@Bar0::@w, @Bar1] firrtl.module private @Bar1() { %w = firrtl.wire sym @a {annotations =...

FIRRTL

Platform: macOS 12.4, x86_64 circt commit: be20cdeebf9fcc3c0ca249f89c8913778a3d94f6 The [Gemmini](https://github.com/ucb-bar/gemmini) design contains a module instance named "module": https://github.com/ucb-bar/gemmini/blob/87550581d98210540ac013f96fbcb9150be39df7/src/main/scala/gemmini/CounterFile.scala#L228 This results in the following parser failure: ``` $ ./build/bin/firtool --format=fir --warn-on-unprocessed-annotations --verify-each=false...

FIRRTL

Passing the following code to `--lower-std-to-handshake` produces a weird output. ```mlir func.func @external_mem(%mem : memref) { return } func.func @normal_mem() { %mem = memref.alloc() : memref func.call @external_mem(%mem) : (memref)...

bug
Handshake