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Also fix up the `DeadArgumentElimination` passes to correctly preserve the annotations; when removing arguments from functions, dead parameters need pruned and alive ones may need their values shifted down by...
This commit adds the sycl_ext_oneapi_virtual_mem experimental extension for reserving and mapping virtual address ranges. Accompanying it is the implementation in the SYCL runtime, together with CUDA and Level Zero backend...
### Describe the bug https://github.com/intel/llvm/pull/14262 is the PR where this error is seen. Error report is here: https://github.com/intel/llvm/actions/runs/9687616520/job/26738219382?pr=14262 ` 2024-06-27T04:04:13.7957983Z /__w/llvm/llvm/toolchain/bin//clang++ -Xsycl-target-backend=amdgcn-amd-amdhsa --offload-arch=gfx1031 -fsycl -fsycl-targets=amdgcn-amd-amdhsa /__w/llvm/llvm/llvm/sycl/test-e2e/BFloat16/bfloat16_vec.cpp -fpreview-breaking-changes -o /__w/llvm/llvm/build-e2e/BFloat16/Output/bfloat16_vec.cpp.tmp2.out 2024-06-27T04:04:13.7959989Z...
Uplift CPU/FPGAEMU RT version from 2024.17.3.0.09 to 2024.18.6.0.02 Uplift TBB versoin from 2021.11.0 to 2021.12.0
Waiting for https://github.com/intel/llvm/pull/14232
Due to formatting, the test case diff is a bit hard to see. Here is an overview of the new tests cases added and their old behavior: `ctanh(-inf + nan*i)...
### Describe the bug Below is simplified reproducer of the failure seen in [e2e/InOrderEventsExt/get_last_event.cpp](https://github.com/intel/llvm/blob/sycl/sycl/test-e2e/InOrderEventsExt/get_last_event.cpp) when built/ran on Windows/CUDA(GTX 1650 / sm_75). The failure is seen intermittently and not on all...
Use the experimental UR entrypoint urEnqueueNativeCommandExp to implement AdaptiveCPP's AdaptiveCpp_enqueue_custom_operation. https://github.com/AdaptiveCpp/AdaptiveCpp/blob/develop/doc/enqueue-custom-operation.md
Add device aspects query if a device supports image arrays, unique addressing per dimension and support for sampling 1D usm images. Remove export semaphore, export image memory and fetch 3D...
