hal-jones
hal-jones
Supporting uop fusion appears to be required (or at least, appears to be typically used) for split store address/data instructions, to allow multiple uops to reference and write to a...
The pipeline stages should be updated to support SMT. This will require each instruction to store a hardware thread ID, which may be queried by pipeline stages to determine the...
`aarch64::Instruction` instances are currently generated using `std::make_shared`, which allocates heap space for the relevant instruction. This incurs a memory management overhead, both at construction and at destruction when the resources...
Remove the existing hard-coded programs found in `tools/simeng/main.cc`, moving them to the regression test suite if suitable (once #77 is merged). This will also allow calling `simeng` with no arguments...
Currently, it's necessary to manually clear completed reads from a memory interface once they've been processed by a component, to prevent them from being re-processed in future. This places a...
The majority of areas that deal with memory assume that all memory access is valid, when in reality access may fault due to inaccessible addresses. A system to flag faults...
The in-order `DecodeUnit` currently only supports a single uop per macro-op. This should be extended to allow for modelling architectures with multiple uops per instruction, by stalling the pipeline behind...
Generated addresses and memory data are currently held in vectors in `A64Instruction`. These should be replaced with arrays to reduce the number of expensive heap allocations. Some memory-accessing instructions may...
For consistency and identifiability, member variables of classes should end in an underscore, i.e.: `value_`, `buffer_`, etc. This is to match the syntax of private variables corresponding to same-name public...
A new function should be added to the branch predictor interface, to allow branch predictor implementations to determine whether the target of a branch was mispredicted once it's been decoded,...