Fábio Mestre

I'm not very familiar with the SYCL-RT codebase, so there might be a good reason to do this changes in a different way. It would be great if someone more...

@intel/llvm-reviewers-runtime / @againull could you have a look at these changes?

Closing this PR. Created a new PR that implements the workaround discussed here: https://github.com/intel/llvm/pull/13024

I have updated the target branch of this PR from the `adapters` branch to the `main` branch. Development in UR is moving back to `main`. The `adapters` branch will soon...

I have updated the target branch of this PR from the `adapters` branch to the `main` branch. Development in UR is moving back to `main`. The `adapters` branch will soon...

I have updated the target branch of this PR from the `adapters` branch to the `main` branch. Development in UR is moving back to `main`. The `adapters` branch will soon...

I have updated the target branch of this PR from the `adapters` branch to the `main` branch. Development in UR is moving back to `main`. The `adapters` branch will soon...

I have updated the target branch of this PR from the `adapters` branch to the `main` branch. Development in UR is moving back to `main`. The `adapters` branch will soon...

This was discussed on the WG meeting of 14/02/2024. There was no objections to this approach. So we will go ahead with adding the new entrypoint to the specification.

@intel/llvm-gatekeepers Can this PR be merged? The existing failures seem to be CI issues. This PR was green for those jobs before: Intel-Arc jobs: - https://github.com/intel/llvm/actions/runs/15681443933/job/44175220366?pr=18792 - https://github.com/intel/llvm/actions/runs/15681443933/job/44175220336?pr=18792 Cuda UR...