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enjoy-digital
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Changes to stream_sim.py and stream.py to make liteeth testbenches and etherbone work with a 64 bit datapath. Corresponding [liteeth pull request](https://github.com/enjoy-digital/liteeth/pull/106). * PacketStreamer / PacketLogger: make them take care of...
init_array is a technique used by gcc to construct a list of pointers to functions that should be run just prior to calling main(). This is used in C++ to...
Hello, This is my proposal for supporting Vivado IP packaging embedded in litex. Due to the complexity of the process, I've added a separate file named vivadoippackaging.py. There is also...
Tested on Arty and Icebreaker. Sample usage from the BaseSoC for Arty, to output the analog signal on the first pin of PMOD B: ``` def add_dac(self): self.platform.add_extension(arty.raw_pmod_io("pmodb")) outsig =...
When debugging https://github.com/enjoy-digital/litedram/issues/293 I found it difficult to reproduce a complete LiteX environment with all dependencies in a specified repository revision. LiteX setup script by default pulls latest master, so...
This is quite a large changeset. It introduces three major components as outlined below, which all depend on each other. I recommend reviewing the individual commits over the very large...
A bit hacky but works ... Tested on Marble-board and verified with wireshark.
@enjoy-digital -- While implementing power management, I found a need to make multiple gated clocks for various domains. I propose supporting the specification of multiple gated clocks with a dictionary...
That PR allows to obtain IP address automatically from DHCP server using `eth_dhcp` command. That command is only available when with_dhcp argument is set in litex/soc/integration/soc.py. `dhcp_get_ip` function in litex/soc/software/bios/boot.c...
The LiteX BIOS checks for the presence of the various CSR_*_BASE definitions to decide to include device support or not. E.g. for I2C, it checks for CSR_I2C_BASE. However, linux-on-litex-vexriscv registers...
