system-on-chip topic
OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
neorv32
:desktop_computer: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Awesome-Retro-Docs
A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
kactus2dev
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
neo430
:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
antikernel
The Antikernel operating system project
ILAng
A Modeling and Verification Platform for SoCs using ILAs
ESP32_Thing
Development platform for the Espressif ESP32 WiFi/Microcontroller SoC
QNICE-FPGA
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.